[PATCH 01/12] soc: fsl: qe: Add chained_irq_{enter,exit}() calls in cascade handler
From: Paul Louvel <hidden>
Date: 2026-07-03 13:30:47
Also in:
linux-arm-kernel, linux-devicetree, linux-gpio, lkml
Subsystem:
freescale quicc engine library, freescale soc drivers, the rest · Maintainers:
Qiang Zhao, Christophe Leroy, Linus Torvalds
Wrap the cascade handler body with chained_irq_{enter,exit}() to
properly inform the parent IRQ chip that a chained interrupt is being
serviced.
Fixes: f0bcd784e1b76 ("soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports")
Signed-off-by: Paul Louvel <redacted>
Cc: stable@kernel.org
---
drivers/soc/fsl/qe/qe_ports_ic.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c
index 9b0bba64e91e..73a77763210d 100644
--- a/drivers/soc/fsl/qe/qe_ports_ic.c
+++ b/drivers/soc/fsl/qe/qe_ports_ic.c@@ -6,6 +6,7 @@ */ #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/platform_device.h>
@@ -79,7 +80,13 @@ static int qepic_get_irq(struct irq_desc *desc) static void qepic_cascade(struct irq_desc *desc) { + struct irq_chip *chip = irq_desc_get_chip(desc); + + chained_irq_enter(chip, desc); + generic_handle_irq(qepic_get_irq(desc)); + + chained_irq_exit(chip, desc); } static int qepic_host_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw)
--
2.55.0