Re: [PATCH] powerpc/64s: Clarify copy_and_flush() cache sync loop comment
From: Aditya Gupta <hidden>
Date: 2026-07-01 18:38:58
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On 01/07/26 23:57, Nikhil Kumar Singh wrote:
quoted hunk ↗ jump to hunk
The value loaded into r0 in copy_and_flush() represents the number of 8-byte words processed between cache synchronization operations. The existing comment refers to cache line size, which can make it appear that the value is a cache line size in bytes rather than a loop count. Clarify the comment to explain that the loop processes 8 words (64 bytes) per cache synchronization iteration, and that increasing the value would skip cache maintenance for intermediate cache lines. This is a comment-only change with no functional impact. Signed-off-by: Nikhil Kumar Singh <redacted> --- arch/powerpc/kernel/head_64.S | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 63432a33ec49..e21c2bce8f7e 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S@@ -713,14 +713,14 @@ p_end: .8byte _end - copy_to_here _GLOBAL(copy_and_flush) addi r5,r5,-8 addi r6,r6,-8 -4: li r0,8 /* Use the smallest common */ - /* denominator cache line */ - /* size. This results in */ - /* extra cache line flushes */ - /* but operation is correct. */ - /* Can't get cache line size */ - /* from NACA as it is being */ - /* moved too. */ +4: li r0,8 /* r0 is the number of 8-byte words */ + /* to copy per cache sync iteration. */ + /* 8 words * 8 bytes = 64 bytes. 64B is */ + /* the current default cache line size. */ + /* This is a loop count, not a byte */ + /* count. Increasing it will skip */ + /* dcbst/icbi for lines in between and */ + /* leave stale instructions in icache. */
Looks good to me, previous comment stating cache line size may make it look like r0 is number of bytes being copied which isn't the case when the code is read. Hence: Reviewed-by: Aditya Gupta <redacted> Thanks, - Aditya G
mtctr r0 /* put # words/line in ctr */ 3: addi r6,r6,8 /* copy a cache line */