Thread (15 messages) 15 messages, 4 authors, 2025-06-04

Re: [PATCH 2/4 v3] PCI/AER: Modify pci_print_aer() to take log level

From: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
Date: 2025-06-03 20:51:22
Also in: linux-acpi, linux-cxl, linux-edac, linux-pci, lkml

On 6/3/25 8:54 AM, Fabio M. De Francesco wrote:
Modify pci_print_aer() to take a printk() log level in preparation of a
patch that logs PCIe Components and Link errors from ELOG.
I think you need to rebase this patch on top of latest PCI changes. A patch to
consolidate the AER error logging is pushed for v6.16 merge.
quoted hunk ↗ jump to hunk
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Fabio M. De Francesco <redacted>
---
  drivers/cxl/core/pci.c |  2 +-
  drivers/pci/pcie/aer.c | 16 ++++++++--------
  include/linux/aer.h    |  4 ++--
  3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 3b80e9a76ba86..ad8d7939c2e1c 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -885,7 +885,7 @@ static void cxl_handle_rdport_errors(struct cxl_dev_state *cxlds)
  	if (!cxl_rch_get_aer_severity(&aer_regs, &severity))
  		return;
  
-	pci_print_aer(pdev, severity, &aer_regs);
+	pci_print_aer(KERN_ERR, pdev, severity, &aer_regs);
  
  	if (severity == AER_CORRECTABLE)
  		cxl_handle_rdport_cor_ras(cxlds, dport);
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index a1cf8c7ef628a..d0ebf7c15afa9 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -760,7 +760,7 @@ int cper_severity_to_aer(int cper_severity)
  EXPORT_SYMBOL_GPL(cper_severity_to_aer);
  #endif
  
-void pci_print_aer(struct pci_dev *dev, int aer_severity,
+void pci_print_aer(char *level, struct pci_dev *dev, int aer_severity,
  		   struct aer_capability_regs *aer)
  {
  	int layer, agent, tlp_header_valid = 0;
@@ -785,14 +785,15 @@ void pci_print_aer(struct pci_dev *dev, int aer_severity,
  	info.mask = mask;
  	info.first_error = PCI_ERR_CAP_FEP(aer->cap_control);
  
-	pci_err(dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask);
+	pci_printk(level, dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n",
+		   status, mask);
  	__aer_print_error(dev, &info);
-	pci_err(dev, "aer_layer=%s, aer_agent=%s\n",
-		aer_error_layer[layer], aer_agent_string[agent]);
+	pci_printk(level, dev, "aer_layer=%s, aer_agent=%s\n",
+		   aer_error_layer[layer], aer_agent_string[agent]);
  
  	if (aer_severity != AER_CORRECTABLE)
-		pci_err(dev, "aer_uncor_severity: 0x%08x\n",
-			aer->uncor_severity);
+		pci_printk(level, dev, "aer_uncor_severity: 0x%08x\n",
+			   aer->uncor_severity);
  
  	if (tlp_header_valid)
  		pcie_print_tlp_log(dev, &aer->header_log, dev_fmt("  "));
@@ -1146,8 +1147,7 @@ static void aer_recover_work_func(struct work_struct *work)
  			       PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn));
  			continue;
  		}
-		pci_print_aer(pdev, entry.severity, entry.regs);
-
+		pci_print_aer(KERN_ERR, pdev, entry.severity, entry.regs);
  		/*
  		 * Memory for aer_capability_regs(entry.regs) is being
  		 * allocated from the ghes_estatus_pool to protect it from
diff --git a/include/linux/aer.h b/include/linux/aer.h
index 02940be66324e..45d0fb2e2e759 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -64,8 +64,8 @@ static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
  static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
  #endif
  
-void pci_print_aer(struct pci_dev *dev, int aer_severity,
-		    struct aer_capability_regs *aer);
+void pci_print_aer(char *level, struct pci_dev *dev, int aer_severity,
+		   struct aer_capability_regs *aer);
  int cper_severity_to_aer(int cper_severity);
  void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
  		       int severity, struct aer_capability_regs *aer_regs);
-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer

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