On Mon, Oct 28, 2024 at 08:44:10AM -1000, Linus Torvalds wrote:

I The *hardware* presumably uses either bit 47/56 because that's the
actual hardware width of the TLB / cache matching.

It is a guess, right?

The bug makes more sense to me if the bit number depends on the active
paging mode: this bit naturally used for indexing in top level page table.
The mistake is more understandable this way.

So no. We're not replacing one simple microarchitectural assumption
(sign bit is sufficient for safety) with another more complicated one
(bit X is sufficient for safety).

Okay, fair enough.

-- 
  Kiryl Shutsemau / Kirill A. Shutemov