[PATCH 2/4] powerpc/64s: Add POWER10 store sync mnemonics
From: Nicholas Piggin <npiggin@gmail.com>
Date: 2023-06-09 10:01:41
Subsystem:
bpf jit for powerpc (32-bit and 64-bit), bpf [general] (safe dynamic programs and tools), linux for powerpc (32-bit and 64-bit), the rest · Maintainers:
Hari Bathini, Christophe Leroy, Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko, Eduard Zingerman, Kumar Kartikeya Dwivedi, Madhavan Srinivasan, Michael Ellerman, Linus Torvalds
ISA v3.1 introduces new sync types for store ordering. stncisync stcisync stsync Add ppc-opcode defines for these. This changes PPC_RAW_SYNC to take L,SC parameters and adds a PPC_RAW_HWSYNC for callers that want the plain old sync (aka hwsync). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- arch/powerpc/include/asm/ppc-opcode.h | 19 ++++++++++++++----- arch/powerpc/kernel/traps.c | 2 +- arch/powerpc/lib/feature-fixups.c | 6 +++--- arch/powerpc/net/bpf_jit_comp64.c | 2 +- 4 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index ca5a0da7df4e..7bc8bbcd4adb 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h@@ -326,6 +326,8 @@ #define ___PPC_R(r) (((r) & 0x1) << 16) #define ___PPC_PRS(prs) (((prs) & 0x1) << 17) #define ___PPC_RIC(ric) (((ric) & 0x3) << 18) +#define ___PPC_L(l) (((l) & 0x7) << 21) +#define ___PPC_SC(sc) (((sc) & 0x3) << 16) #define __PPC_RA(a) ___PPC_RA(__REG_##a) #define __PPC_RA0(a) ___PPC_RA(__REGA0_##a) #define __PPC_RB(b) ___PPC_RB(__REG_##b)
@@ -378,8 +380,6 @@ #define PPC_RAW_LQARX(t, a, b, eh) (0x7c000228 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh)) #define PPC_RAW_LDARX(t, a, b, eh) (0x7c0000a8 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh)) #define PPC_RAW_LWARX(t, a, b, eh) (0x7c000028 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh)) -#define PPC_RAW_PHWSYNC (0x7c8004ac) -#define PPC_RAW_PLWSYNC (0x7ca004ac) #define PPC_RAW_STQCX(t, a, b) (0x7c00016d | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_MADDHD(t, a, b, c) (0x10000030 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | ___PPC_RC(c)) #define PPC_RAW_MADDHDU(t, a, b, c) (0x10000031 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | ___PPC_RC(c))
@@ -396,6 +396,13 @@ #define PPC_RAW_RFCI (0x4c000066) #define PPC_RAW_RFDI (0x4c00004e) #define PPC_RAW_RFMCI (0x4c00004c) +#define PPC_RAW_SYNC(l, sc) (0x7c0004ac | ___PPC_L(l) | ___PPC_SC(sc)) +#define PPC_RAW_HWSYNC() PPC_RAW_SYNC(0, 0) +#define PPC_RAW_STNCISYNC() PPC_RAW_SYNC(1, 1) +#define PPC_RAW_STCISYNC() PPC_RAW_SYNC(0, 2) +#define PPC_RAW_STSYNC() PPC_RAW_SYNC(0, 3) +#define PPC_RAW_PHWSYNC() PPC_RAW_SYNC(4, 0) +#define PPC_RAW_PLWSYNC() PPC_RAW_SYNC(5, 0) #define PPC_RAW_TLBILX(t, a, b) (0x7c000024 | __PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b)) #define PPC_RAW_WAIT_v203 (0x7c00007c) #define PPC_RAW_WAIT(w, p) (0x7c00003c | __PPC_WC(w) | __PPC_PL(p))
@@ -421,7 +428,6 @@ #define PPC_RAW_DCBFPS(a, b) (0x7c0000ac | ___PPC_RA(a) | ___PPC_RB(b) | (4 << 21)) #define PPC_RAW_DCBSTPS(a, b) (0x7c0000ac | ___PPC_RA(a) | ___PPC_RB(b) | (6 << 21)) #define PPC_RAW_SC() (0x44000002) -#define PPC_RAW_SYNC() (0x7c0004ac) #define PPC_RAW_ISYNC() (0x4c00012c) /*
@@ -641,8 +647,11 @@ #define STBCIX(s, a, b) stringify_in_c(.long PPC_RAW_STBCIX(s, a, b)) #define PPC_DCBFPS(a, b) stringify_in_c(.long PPC_RAW_DCBFPS(a, b)) #define PPC_DCBSTPS(a, b) stringify_in_c(.long PPC_RAW_DCBSTPS(a, b)) -#define PPC_PHWSYNC stringify_in_c(.long PPC_RAW_PHWSYNC) -#define PPC_PLWSYNC stringify_in_c(.long PPC_RAW_PLWSYNC) +#define PPC_STNCISYNC stringify_in_c(.long PPC_RAW_STNCISYNC()) +#define PPC_STCISYNC stringify_in_c(.long PPC_RAW_STCISYNC()) +#define PPC_STSYNC stringify_in_c(.long PPC_RAW_STSYNC()) +#define PPC_PHWSYNC stringify_in_c(.long PPC_RAW_PHWSYNC()) +#define PPC_PLWSYNC stringify_in_c(.long PPC_RAW_PLWSYNC()) #define STXVD2X(s, a, b) stringify_in_c(.long PPC_RAW_STXVD2X(s, a, b)) #define LXVD2X(s, a, b) stringify_in_c(.long PPC_RAW_LXVD2X(s, a, b)) #define MFVRD(a, t) stringify_in_c(.long PPC_RAW_MFVRD(a, t))
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9bdd79aa51cf..4b216c208f41 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c@@ -550,7 +550,7 @@ static inline int check_io_access(struct pt_regs *regs) nip -= 2; else if (*nip == PPC_RAW_ISYNC()) --nip; - if (*nip == PPC_RAW_SYNC() || get_op(*nip) == OP_TRAP) { + if (*nip == PPC_RAW_HWSYNC() || get_op(*nip) == OP_TRAP) { unsigned int rb; --nip;
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 80def1c2afcb..4c6e7111354f 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c@@ -193,7 +193,7 @@ static void do_stf_entry_barrier_fixups(enum stf_barrier_type types) } else if (types & STF_BARRIER_EIEIO) { instrs[i++] = PPC_RAW_EIEIO() | 0x02000000; /* eieio + bit 6 hint */ } else if (types & STF_BARRIER_SYNC_ORI) { - instrs[i++] = PPC_RAW_SYNC(); + instrs[i++] = PPC_RAW_HWSYNC(); instrs[i++] = PPC_RAW_LD(_R10, _R13, 0); instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */ }
@@ -234,7 +234,7 @@ static void do_stf_exit_barrier_fixups(enum stf_barrier_type types) instrs[i++] = PPC_RAW_MTSPR(SPRN_SPRG2, _R13); instrs[i++] = PPC_RAW_MFSPR(_R13, SPRN_SPRG1); } - instrs[i++] = PPC_RAW_SYNC(); + instrs[i++] = PPC_RAW_HWSYNC(); instrs[i++] = PPC_RAW_LD(_R13, _R13, 0); instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */ if (cpu_has_feature(CPU_FTR_HVMODE))
@@ -543,7 +543,7 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_ if (enable) { pr_info("barrier-nospec: using isync; sync as speculation barrier\n"); instr[0] = PPC_RAW_ISYNC(); - instr[1] = PPC_RAW_SYNC(); + instr[1] = PPC_RAW_HWSYNC(); } i = do_patch_fixups(start, end, instr, ARRAY_SIZE(instr));
diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
index 0f8048f6dad6..e8257bfc1cb4 100644
--- a/arch/powerpc/net/bpf_jit_comp64.c
+++ b/arch/powerpc/net/bpf_jit_comp64.c@@ -737,7 +737,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * EMIT(PPC_RAW_EIEIO() | 0x02000000); break; case STF_BARRIER_SYNC_ORI: - EMIT(PPC_RAW_SYNC()); + EMIT(PPC_RAW_HWSYNC()); EMIT(PPC_RAW_LD(tmp1_reg, _R13, 0)); EMIT(PPC_RAW_ORI(_R31, _R31, 0)); break;
--
2.40.1