[PATCH v9 06/10] arm64: dts: ls1046a: Add serdes bindings
From: Sean Anderson <hidden>
Date: 2022-12-30 00:02:09
Also in:
linux-arm-kernel, linux-devicetree, linux-phy
Subsystem:
arm/freescale layerscape arm architecture, the rest · Maintainers:
Frank Li, Linus Torvalds
This adds bindings for the SerDes devices. They are disabled by default to prevent any breakage on existing boards. Signed-off-by: Sean Anderson <redacted> --- (no changes since v4) Changes in v4: - Convert to new bindings Changes in v3: - Describe modes in device tree Changes in v2: - Use one phy cell for SerDes1, since no lanes can be grouped - Disable SerDes by default to prevent breaking boards inadvertently. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index a01e3cfec77f..12adccd5caae 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi@@ -424,6 +424,24 @@ sfp: efuse@1e80000 { clock-names = "sfp"; }; + serdes1: serdes@1ea0000 { + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g"; + reg = <0x0 0x1ea0000 0x0 0x2000>; + status = "disabled"; + }; + + serdes2: serdes@1eb0000 { + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g"; + reg = <0x0 0x1eb0000 0x0 0x2000>; + status = "disabled"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x1000>;
--
2.35.1.1320.gc452695387.dirty