Thread (37 messages) 37 messages, 3 authors, 2021-08-24

Re: [PATCH v5 10/11] powerpc/pseries/iommu: Make use of DDW for indirect mapping

From: Frederic Barrat <hidden>
Date: 2021-07-21 15:05:11
Also in: lkml


On 21/07/2021 05:32, Alexey Kardashevskiy wrote:
quoted
quoted
+        struct iommu_table *newtbl;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pci->phb->mem_resources); i++) {
+            const unsigned long mask = IORESOURCE_MEM_64 | 
IORESOURCE_MEM;
+
+            /* Look for MMIO32 */
+            if ((pci->phb->mem_resources[i].flags & mask) == 
IORESOURCE_MEM)
+                break;
+        }
+
+        if (i == ARRAY_SIZE(pci->phb->mem_resources))
+            goto out_del_list;

So we exit and do nothing if there's no MMIO32 bar?
Isn't the intent just to figure out the MMIO32 area to reserve it when 
init'ing the table? In which case we could default to 0,0

I'm actually not clear why we are reserving this area on pseries.


If we do not reserve it, then the iommu code will allocate DMA pages 
from there and these addresses are MMIO32 from the kernel pov at least. 
I saw crashes when (I think) a device tried DMAing to the top 2GB of the 
bus space which happened to be a some other device's BAR.

hmmm... then figuring out the correct range needs more work. We could 
have more than one MMIO32 bar. And they don't have to be adjacent. I 
don't see that we are reserving any range on the initial table though 
(on pseries).

   Fred
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help