Re: [RFC PATCH 6/8] powerpc/mm/book3s64/hash: drop pre 2.06 tlbiel for clang
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From: Christophe Leroy <hidden>
Date: 2021-03-22 16:50:27
Le 19/03/2021 à 03:01, Nicholas Piggin a écrit :
Excerpts from Daniel Axtens's message of February 25, 2021 1:10 pm:quoted
The llvm integrated assembler does not recognise the ISA 2.05 tlbiel version. Eventually do this more smartly.The whole thing with TLBIE and TLBIEL in this file seems a bit too clever. We should have PPC_TLBIE* macros for all of them.
I was expecting to drop PPC_* macros as much as possible taking into account the later binutils support most of them (https://github.com/linuxppc/issues/issues/350). Was not expecting to go the other direction. See following series for an exemple of why we would want to get rid of PPC_* macros. https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=231583&state=* Christophe
Thanks, Nickquoted
Signed-off-by: Daniel Axtens <redacted> --- arch/powerpc/mm/book3s64/hash_native.c | 10 ++++++++++ 1 file changed, 10 insertions(+)diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/book3s64/hash_native.c index 52e170bd95ae..c5937f69a452 100644 --- a/arch/powerpc/mm/book3s64/hash_native.c +++ b/arch/powerpc/mm/book3s64/hash_native.c@@ -267,9 +267,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) va |= ssize << 8; sllp = get_sllp_encoding(apsize); va |= sllp << 5; +#if 0 asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,0", %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); +#endif + asm volatile("tlbiel %0" + : : "r" (va) + : "memory"); break; default: /* We need 14 to 14 + i bits of va */@@ -286,9 +291,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) */ va |= (vpn & 0xfe); va |= 1; /* L */ +#if 0 asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,1", %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); +#endif + asm volatile("tlbiel %0" + : : "r" (va) + : "memory"); break; } trace_tlbie(0, 1, va, 0, 0, 0, 0);-- 2.27.0