Thread (49 messages) 49 messages, 9 authors, 2019-07-22

Re: [PATCH v4 6/8] KVM: PPC: Ultravisor: Restrict LDBAR access

From: Alexey Kardashevskiy <hidden>
Date: 2019-07-01 06:32:37


On 01/07/2019 16:17, maddy wrote:
On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote:
quoted
On 29/06/2019 06:08, Claudio Carvalho wrote:
quoted
When the ultravisor firmware is available, it takes control over the
LDBAR register. In this case, thread-imc updates and save/restore
operations on the LDBAR register are handled by ultravisor.
What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9
Processor" do not tell.
LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter
data into memory.
LDBAR contains memory address along with few other configuration bits
(it is populated
by the thread-imc pmu driver). It is populated and enabled only when any
of the thread
imc pmu events are monitored.

I was actually looking for a spec for this register, what is the
document name?

Maddy
quoted
quoted
Signed-off-by: Claudio Carvalho <redacted>
Reviewed-by: Ram Pai <redacted>
Reviewed-by: Ryan Grimm <redacted>
Acked-by: Madhavan Srinivasan <redacted>
Acked-by: Paul Mackerras <redacted>
---
  arch/powerpc/kvm/book3s_hv_rmhandlers.S   | 2 ++
  arch/powerpc/platforms/powernv/idle.c     | 6 ++++--
  arch/powerpc/platforms/powernv/opal-imc.c | 4 ++++
  3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index f9b2620fbecd..cffb365d9d02 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -375,8 +375,10 @@ BEGIN_FTR_SECTION
      mtspr    SPRN_RPR, r0
      ld    r0, KVM_SPLIT_PMMAR(r6)
      mtspr    SPRN_PMMAR, r0
+BEGIN_FW_FTR_SECTION_NESTED(70)
      ld    r0, KVM_SPLIT_LDBAR(r6)
      mtspr    SPRN_LDBAR, r0
+END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70)
      isync
  FTR_SECTION_ELSE
      /* On P9 we use the split_info for coordinating LPCR changes */
diff --git a/arch/powerpc/platforms/powernv/idle.c
b/arch/powerpc/platforms/powernv/idle.c
index 77f2e0a4ee37..5593a2d55959 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned
long psscr, bool mmu_on)
          sprs.ptcr    = mfspr(SPRN_PTCR);
          sprs.rpr    = mfspr(SPRN_RPR);
          sprs.tscr    = mfspr(SPRN_TSCR);
-        sprs.ldbar    = mfspr(SPRN_LDBAR);
+        if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
+            sprs.ldbar    = mfspr(SPRN_LDBAR);
            sprs_saved = true;
  @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned
long psscr, bool mmu_on)
      mtspr(SPRN_PTCR,    sprs.ptcr);
      mtspr(SPRN_RPR,        sprs.rpr);
      mtspr(SPRN_TSCR,    sprs.tscr);
-    mtspr(SPRN_LDBAR,    sprs.ldbar);
+    if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
+        mtspr(SPRN_LDBAR,    sprs.ldbar);
        if (pls >= pnv_first_tb_loss_level) {
          /* TB loss */
diff --git a/arch/powerpc/platforms/powernv/opal-imc.c
b/arch/powerpc/platforms/powernv/opal-imc.c
index 1b6932890a73..5fe2d4526cbc 100644
--- a/arch/powerpc/platforms/powernv/opal-imc.c
+++ b/arch/powerpc/platforms/powernv/opal-imc.c
@@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct
platform_device *pdev)
      bool core_imc_reg = false, thread_imc_reg = false;
      u32 type;
  +    /* Disable IMC devices, when Ultravisor is enabled. */
+    if (firmware_has_feature(FW_FEATURE_ULTRAVISOR))
+        return -EACCES;
+
      /*
       * Check whether this is kdump kernel. If yes, force the
engines to
       * stop and return.
-- 
Alexey
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