Thread (22 messages) 22 messages, 7 authors, 2019-07-29

Re: [PATCH v2] powerpc: slightly improve cache helpers

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From: Nathan Chancellor <hidden>
Date: 2019-07-09 06:49:58
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On Tue, Jul 09, 2019 at 07:04:43AM +0200, Christophe Leroy wrote:

Le 08/07/2019 à 21:14, Nathan Chancellor a écrit :
quoted
On Mon, Jul 08, 2019 at 11:19:30AM +1000, Michael Ellerman wrote:
quoted
On Fri, 2019-05-10 at 09:24:48 UTC, Christophe Leroy wrote:
quoted
Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers
that are summed to obtain the target address. Using 'Z' constraint
and '%y0' argument gives GCC the opportunity to use both registers
instead of only one with the second being forced to 0.

Suggested-by: Segher Boessenkool <redacted>
Signed-off-by: Christophe Leroy <redacted>
Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/6c5875843b87c3adea2beade9d1b8b3d4523900a

cheers
This patch causes a regression with clang:
Is that a Clang bug ?
No idea, it happens with clang-8 and clang-9 though (pretty sure there
were fixes for PowerPC in clang-8 so something before it probably won't
work but I haven't tried).
Do you have a disassembly of the code both with and without this patch in
order to compare ?
I can give you whatever disassembly you want (or I can upload the raw
files if that is easier).

Cheers,
Nathan
Segher, any idea ?

Christophe
quoted
https://travis-ci.com/ClangBuiltLinux/continuous-integration/jobs/213944668

I've attached my local bisect/build log.

Cheers,
Nathan
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