On Thu, May 03, 2018 at 03:50:47PM +1000, Paul Mackerras wrote:

On Wed, Apr 25, 2018 at 07:54:37PM +0800, wei.guo.simon@gmail.com wrote:

quoted

From: Simon Guo <redacted>

stwsiwx will place contents of word element 1 of VSR into word
storage of EA. So the element size of stwsiwx should be 4.

This patch correct the size from 8 to 4.

Signed-off-by: Simon Guo <redacted>
---
 arch/powerpc/lib/sstep.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 34d68f1..151d484 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c

@@ -2178,7 +2178,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
 		case 140:	/* stxsiwx */
 			op->reg = rd | ((instr & 1) << 5);
 			op->type = MKOP(STORE_VSX, 0, 4);
-			op->element_size = 8;
+			op->element_size = 4;

I made the element_size be 8 deliberately because this way, with
size=4 but element_size=8, the code will naturally choose the correct
word (the least-significant word of the left half) of the register to
store into memory.  With this change you then need the special case in
a later patch for stxsiwx, which you shouldn't need if you don't make
this change.

Paul.

Thanks for point out. I will update accordingly.

Thanks,
- Simon