Re: [PATCH v2] cxl: Set the valid bit in PE for dedicated mode
flat view
From: Frederic Barrat <hidden>
Date: 2017-09-04 10:09:48
Le 04/09/2017 à 10:48, Vaibhav Jain a écrit :
Make sure to set the valid-bit in software-state field of the populated PE. This was earlier missing for dedicated mode AFUs, hence was causing a PSL freeze when the AFU was activated. Signed-off-by: Vaibhav Jain <redacted> --- Changelog: v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman] ---
Acked-by: Frederic Barrat <redacted>
quoted hunk ↗ jump to hunk
drivers/misc/cxl/native.c | 8 ++++++++ 1 file changed, 8 insertions(+)diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c index 4a82c313cf71..75df74d59527 100644 --- a/drivers/misc/cxl/native.c +++ b/drivers/misc/cxl/native.c@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr) if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); + ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V); + /* + * Ideally we should do a wmb() here to make sure the changes to the + * PE are visible to the card before we call afu_enable. + * On ppc64 though all mmios are preceded by a 'sync' instruction hence + * we dont dont need one here. + */ + result = cxl_ops->afu_reset(afu); if (result) return result;