[PATCH v2] cxl: Set the valid bit in PE for dedicated mode

Subsystems: char and misc drivers, the rest

STALE3260d

4 messages, 4 authors, 2017-10-05 · open the first message on its own page

[PATCH v2] cxl: Set the valid bit in PE for dedicated mode

From: Vaibhav Jain <hidden>
Date: 2017-09-04 08:50:00

Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain <redacted>
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---

 drivers/misc/cxl/native.c | 8 ++++++++
 1 file changed, 8 insertions(+)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
 	if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
 		afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
 
+	ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+	/*
+	 * Ideally we should do a wmb() here to make sure the changes to the
+	 * PE are visible to the card before we call afu_enable.
+	 * On ppc64 though all mmios are preceded by a 'sync' instruction hence
+	 * we dont dont need one here.
+	 */
+
 	result = cxl_ops->afu_reset(afu);
 	if (result)
 		return result;
-- 
2.13.5

Re: [PATCH v2] cxl: Set the valid bit in PE for dedicated mode

From: Frederic Barrat <hidden>
Date: 2017-09-04 10:09:48


Le 04/09/2017 à 10:48, Vaibhav Jain a écrit :
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain <redacted>
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---
Acked-by: Frederic Barrat <redacted>

quoted hunk
  drivers/misc/cxl/native.c | 8 ++++++++
  1 file changed, 8 insertions(+)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
  	if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
  		afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);

+	ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+	/*
+	 * Ideally we should do a wmb() here to make sure the changes to the
+	 * PE are visible to the card before we call afu_enable.
+	 * On ppc64 though all mmios are preceded by a 'sync' instruction hence
+	 * we dont dont need one here.
+	 */
+
  	result = cxl_ops->afu_reset(afu);
  	if (result)
  		return result;

Re: [PATCH v2] cxl: Set the valid bit in PE for dedicated mode

From: Andrew Donnellan <hidden>
Date: 2017-09-05 00:37:41

Acked-by: Andrew Donnellan <redacted>

On 04/09/17 18:48, Vaibhav Jain wrote:
quoted hunk
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain <redacted>
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---

  drivers/misc/cxl/native.c | 8 ++++++++
  1 file changed, 8 insertions(+)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
  	if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
  		afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
  
+	ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+	/*
+	 * Ideally we should do a wmb() here to make sure the changes to the
+	 * PE are visible to the card before we call afu_enable.
+	 * On ppc64 though all mmios are preceded by a 'sync' instruction hence
+	 * we dont dont need one here.
+	 */
+
  	result = cxl_ops->afu_reset(afu);
  	if (result)
  		return result;
-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan@au1.ibm.com  IBM Australia Limited

Re: [v2] cxl: Set the valid bit in PE for dedicated mode

From: Michael Ellerman <hidden>
Date: 2017-10-05 04:21:41

On Mon, 2017-09-04 at 08:48:25 UTC, Vaibhav Jain wrote:
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain <redacted>
Acked-by: Frederic Barrat <redacted>
Acked-by: Andrew Donnellan <redacted>
Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/8512bffd6226fea259f94fd23fc3b6

cheers
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