Re: [PATCH V4 7/7] cxl: Add psl9 specific code

Frederic Barrat [off-list ref] writes:

Le 07/04/2017 =C3=A0 16:11, Christophe Lombard a =C3=A9crit :

quoted

The new Coherent Accelerator Interface Architecture, level 2, for the
IBM POWER9 brings new content and features:
- POWER9 Service Layer
- Registers
- Radix mode
- Process element entry
- Dedicated-Shared Process Programming Model
- Translation Fault Handling
- CAPP
- Memory Context ID
    If a valid mm_struct is found the memory context id is used for each
    transaction associated with the process handle. The PSL uses the
    context ID to find the corresponding process element.

Signed-off-by: Christophe Lombard <redacted>
---

I'm ok with the code. However checkpatch is complaining about a=20
tab/space error in native.c

I already fixed it up when I applied them (and a bunch of other things).

If you have a quick respin, I also have a comment below about the=20
documentation.

So please send me an incremental patch to update the doco and I'll
squash it before merging the series.

cheers