On Wed, Oct 26, 2016 at 01:57:23PM -0500, Benjamin Herrenschmidt wrote:

On Wed, 2016-10-26 at 16:03 +0300, Dan Carpenter wrote:

quoted

   565          cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */
   566          opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */
   567          ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */
                                 ^^^^^^^^^^^^^^^^^
This is zero.  It looks like 0x00000600 was probably intended?

I just checked the spec and for the 405gp and it's 0x6000 (bits 17 and
18 in IBM ordering)

I'm on the road and there is no way I'm going to remember to do this
when I get back...  Could you send the patch?

regards,
dan carpenter