Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well

On Wed, 2013-11-20 at 12:47 -0600, Kumar Gala wrote:

On Nov 20, 2013, at 10:41 AM, Scott Wood [off-list ref] wrot=

e:

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quoted

On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote:

quoted

CONFIG_ALTIVEC is always enabled for CoreNet64.

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In the defconfig perhaps, but this isn't a generally true statement.
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And if we select CONFIG_E{5,6}500_CPU this may introduce -mcpu=3De50=

0mc64

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into $CFLAGS. But Altivec and Spe options not allowed with
e500mc64, so :

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Sigh.
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 CC      arch/powerpc/lib/xor_vmx.o
arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this=

 target

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make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1
make: *** [arch/powerpc/lib] Error 2
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Signed-off-by: Tiejun Chen <redacted>
---
arch/powerpc/lib/Makefile |    3 +++
1 file changed, 3 insertions(+)
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diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 95a20e1..641a77d 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile

@@ -40,5 +40,8 @@ obj-y			+=3D code-patching.o

obj-y			+=3D feature-fixups.o
obj-$(CONFIG_FTR_FIXUP_SELFTEST) +=3D feature-fixups-test.o
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+# Altivec and Spe options not allowed with e500mc64 in GCC.
+ifeq ($(call cc-option-yn,-mcpu=3De500mc64),n)
obj-$(CONFIG_ALTIVEC)	+=3D xor_vmx.o
CFLAGS_xor_vmx.o +=3D -maltivec -mabi=3Daltivec
+endif

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This does not seem like the right fix.  What if GCC supports both
-mcpu=3De500mc64 and -mcpu=3De6500, and we're using the latter?  Or f=

or that

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matter, if we're using -mcpu=3Dwhatever-ibm-chip-has-this?
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Plus, wouldn't you need to do something to prevent code in that file
from being called?
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-Scott

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Why does -mcpu=3De500mc64 get you spe enabled?  It shouldn=E2=80=99t as=

 no e500mc or greater part has spe.  Can you try using -mno-spe -maltivec=
?

I don't think SPE is relevant.  The problem is that GCC refuses to allow
-maltivec to be combined with -mcpu=3De500mc64.  -mno-spe doesn't make a
difference.

-Scott