Re: [PATCH] powerpc: net: filter: fix DIVWU instruction opcode

On 12 Sep 2013, at 10:02, Michael Neuling [off-list ref] wrote:

Vladimir Murzin [off-list ref] wrote:
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quoted

Currently DIVWU stands for *signed* divw opcode:
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7d 2a 4b 96    divwu   r9,r10,r9
7d 2a 4b d6    divw    r9,r10,r9
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Use the *unsigned* divw opcode for DIVWU.

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This looks like it's in only used in the BPF JIT code. =20
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Matt, any chance you an ACK/NACK this?

Sure, that looks sensible, thanks Vladimir.=20

Acked-by: Matt Evans <redacted>

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Mikey
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quoted

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Signed-off-by: Vladimir Murzin <redacted>
---
arch/powerpc/include/asm/ppc-opcode.h |    2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include=

/asm/ppc-opcode.h

quoted

index d7fe9f5..c91842c 100644

--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h

@@ -218,7 +218,7 @@

#define PPC_INST_MULLW            0x7c0001d6
#define PPC_INST_MULHWU            0x7c000016
#define PPC_INST_MULLI            0x1c000000
-#define PPC_INST_DIVWU            0x7c0003d6
+#define PPC_INST_DIVWU            0x7c000396
#define PPC_INST_RLWINM            0x54000000
#define PPC_INST_RLDICR            0x78000004
#define PPC_INST_SLW            0x7c000030
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1.7.10.4
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