RE: [PATCH 0/5 v11] iommu/fsl: Freescale PAMU driver and IOMMU API implementation.

-----Original Message-----
From: Joerg Roedel [mailto:joro@8bytes.org]
Sent: Tuesday, April 02, 2013 9:53 PM
To: Sethi Varun-B16395
Cc: Yoder Stuart-B08248; Wood Scott-B07421; iommu@lists.linux-
foundation.org; linuxppc-dev@lists.ozlabs.org; linux-
kernel@vger.kernel.org; galak@kernel.crashing.org;
benh@kernel.crashing.org
Subject: Re: [PATCH 0/5 v11] iommu/fsl: Freescale PAMU driver and IOMMU
API implementation.
=20
On Fri, Mar 29, 2013 at 01:23:57AM +0530, Varun Sethi wrote:

quoted

This patchset provides the Freescale PAMU (Peripheral Access
Management Unit) driver and the corresponding IOMMU API
implementation. PAMU is the IOMMU present on Freescale QorIQ
platforms. PAMU can authorize memory access, remap the memory address,

and remap the I/O transaction type.

quoted

This set consists of the following patches:
1.  Make iova dma_addr_t in the iommu_iova_to_phys API.
2. Addition of new field in the device (powerpc) archdata structure for

storing iommu domain information

quoted

   pointer.
3. Add window permission flags in the iommu_domain_window_enable API.
4. Add domain attributes for FSL PAMU driver.
5. PAMU driver and IOMMU API implementation.

=20
Okay, I am about to apply patches 1 and 3 to a new ppc/pamu branch in my
tree.
=20
As a general question, how did you test the IOMMU driver and what will
you do in the future to avoid regressions?
=20

I use a kernel module for testing the iommu_api support. The module allows =
for dynamic creation and deletion of iommu domains for the devices in the d=
evice tree. Also, the vfio support (under development) for Freescale SOCs w=
ith APMU hardware would depend on the PAMU driver.

-Varun