Thread (10 messages) flat view 10 messages, 4 authors, 2013-01-09

RE: [PATCH] powerpc: POWER7 optimised memcpy using VMX and enhanced prefetch

From: David Laight <hidden>
Date: 2012-12-18 14:27:20

quoted
quoted
       dcbt    r0,r8,0b01010   /* GO */
.machine pop
Jimi, are you using an "old" binutils from before my patch that
changed the operand order for these types of instructions?

   http://sourceware.org/ml/binutils/2009-02/msg00044.html
=20
Actually, this confused me as well, that embedded has the same
instruction encoding but different mnemonic.
That it utterly horrid!
I was under the impression that the assembler made no instruction =
decisions based on CPU.
So your only hint would be that '0b' prefix.
Does AS even see that?
Or maybe see the 'r' prefix.
I know they tend to be absent making ppc asm even more unreadable.
It isn't as though the mnemonics were designed at a time when
the source file size or difference in decode time (or code space)
would be significant.

Otherwise it is a complete recipe for disaster.

	David
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