Re: [PATCH] powerpc/85xx:DTS: Fix tbi node location for Px020RDB

On Wed, Jun 22, 2011 at 5:34 AM, Kumar Gala [off-list ref] wro=
te:

On Jun 7, 2011, at 9:49 PM, Prabhakar Kushwaha wrote:

quoted

ten-bit interface (TBI) module is part of SoC not board.

Move tbi entries from board related dts files to Si dts.

Signed-off-by: Prabhakar Kushwaha <redacted>
---
Based upon http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.=

git (branch next)

quoted

arch/powerpc/boot/dts/p1020rdb.dts =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A09 ---=

------

quoted

arch/powerpc/boot/dts/p1020rdb_camp_core0.dts | =A0 =A08 --------
arch/powerpc/boot/dts/p1020si.dtsi =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A06 +++=

++-

quoted

arch/powerpc/boot/dts/p2020rdb.dts =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A08 ---=

-----

quoted

arch/powerpc/boot/dts/p2020rdb_camp_core0.dts | =A0 =A08 --------
arch/powerpc/boot/dts/p2020si.dtsi =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A06 +++=

++-

quoted

6 files changed, 10 insertions(+), 35 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/=

p1020rdb.dts

quoted

index d6a8ae4..a4e5d6c 100644

--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts

@@ -211,14 +211,6 @@

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 };
=A0 =A0 =A0 =A0 =A0 =A0 =A0 };

- =A0 =A0 =A0 =A0 =A0 =A0 mdio@25000 {
-
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 tbi0: tbi-phy@11 {
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x11>=

;

quoted

- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 device_type =

=3D "tbi-phy";

quoted

- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 };
- =A0 =A0 =A0 =A0 =A0 =A0 };
-
=A0 =A0 =A0 =A0 =A0 =A0 =A0 enet0: ethernet@b0000 {
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 fixed-link =3D <1 1 1000 0 0=

;

quoted

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 phy-connection-type =3D "rgm=

ii-id";

quoted

@@ -227,7 +219,6 @@

=A0 =A0 =A0 =A0 =A0 =A0 =A0 enet1: ethernet@b1000 {
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 phy-handle =3D <&phy0>;
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 tbi-handle =3D <&tbi0>;
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 phy-connection-type =3D "sgm=

ii";

quoted

=A0 =A0 =A0 =A0 =A0 =A0 =A0 };

I'm not sure we should do this. =A0The phy address we pick is board speci=

fic so it should NOT be in .dtsi

Ah, okay.  I was under the impression that the tbi address was
internal to the SoC, and not configurable.

g.