Re: [RFC] Inter-processor Mailboxes Drivers

Hi,

On Sat, Feb 12, 2011 at 2:49 AM, Meador Inge [off-list ref] wrote=
:

=A0 =A01. Hardware specific bits somewhere under '.../arch/*'. =A0Drivers
=A0 =A0 =A0 for the MPIC message registers on Power and OMAP4 mailboxes, =

for

=A0 =A0 =A0 example.

Yes; this can help.

=A0 =A02. A higher level driver under '.../drivers/mailbox/*'. =A0That th=

e

=A0 =A0 =A0 pieces in (1) would register with. =A0This piece would expose=

 the

=A0 =A0 =A0 main kernel API.

A lot of mailboxes are too platform specific with regards to the communicat=
ion
with the main CPU and probably it depends on the mailbox too; you can
find polling and
interrupt supported mailbox support at times on the same platform.
APIs should probably be
generic enough to be able to operate in any context.

Now I have the following questions:

=A0 =A01. Do others see value in this?

At least I would like this; I wanted to generalize such mailbox IPCs
right from the
day when I was working on one, but coudnt really work on that.

=A0 =A02. Does something like this already exist?

Not generic as you say; but apart from the OMAP platforms,
you could refer to arch/arm/mach-ux500/prcmu for a mailbox based
IPC on the U8500 platform.

=A0 =A03. Is someone else already working on this?

Not sure of that too :), but I am CCing Linus W, the maintainer
of U8500 if he thinks it is a good idea to come up with a mailbox IPC
framework

Cheers!
--=20
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