Thread (24 messages) 24 messages, 4 authors, 2010-03-29

Re: Problem with PCI bus rescan on 460EX

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2010-03-15 05:51:59

Possibly related (same subject, not in this thread)

On Mon, 2010-03-15 at 14:39 +0900, Kenji Kaneshige wrote:
quoted
Yes, with these lines removed bridge memory window is properly
allocated.

These lines are to prevent updating IO or memory windows when there
are
some devices working behind the bridge. So please note that removing
these lines is just for debugging.
This is not a very good way to do so though. Many firmwares will leave
those enabled even when the bridges -do- have to be reconfigured.

Worse... the code means that the kernel -will- have updated its resource
tree, probably assigned new resources, etc... to those bridges, and thus
to devices underneath them, but will silently fail to actually update
the bridge BARs to match.

This seems like a major bug to me in fact.

Cheers,
Ben.
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