[PATCH 5/6] powerpc: add USB peripheral support to MPC836xMDS

@@ -235,6 +235,17 @@
 					0  2  1  0  1  0>; /* MDC */
 			};
 
+			pio_usb: usb_pin@01 {
+				pio-map = <
+			/* port  pin  dir  open_drain  assignment  has_irq */
+					1  2  1  0  3  0        /* USBOE  */
+					1  3  1  0  3  0        /* USBTP  */
+					1  8  1  0  1  0        /* USBTN  */
+					1 10  2  0  3  0        /* USBRXD */
+					1  9  2  1  3  0        /* USBRP  */
+					1 11  2  1  3  0>;      /* USBRN  */
+			};
+
 		};
 	};
 

@@ -280,11 +291,13 @@
 		};
 
 		usb@6c0 {
-			compatible = "qe_udc";
+			compatible = "fsl,qe_udc";
 			reg = <0x6c0 0x40 0x8b00 0x100>;
 			interrupts = <11>;
 			interrupt-parent = <&qeic>;
 			mode = "slave";
+			usb-clock = <21>;
+			pio-handle = <&pio_usb>;
 		};
 
 		enet0: ucc@2000 {

@@ -93,6 +93,12 @@ static void __init mpc836x_mds_setup_arch(void)
 
 		for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
 			par_io_of_config(np);
+
+		np = of_find_compatible_node(NULL, NULL, "fsl,qe_udc");
+		if (np) {
+			par_io_of_config(np);
+			qe_usb_clock_set(np);
+		}
 	}
 
 	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))

@@ -127,9 +133,20 @@ static void __init mpc836x_mds_setup_arch(void)
 			iounmap(immap);
 		}
 
-		iounmap(bcsr_regs);
 		of_node_put(np);
 	}
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,qe_udc");
+	if (np != NULL) {
+		/* Set the TESCs run on RGMII mode */
+		bcsr_regs[8] &= ~0xf0;
+		/* Enable the USB Device PHY */
+		bcsr_regs[13] &= ~0x0f;
+		udelay(1000);
+		bcsr_regs[13] |= 0x05;
+		of_node_put(np);
+	}
+	iounmap(bcsr_regs);
 #endif				/* CONFIG_QUICC_ENGINE */
 }
 

@@ -63,5 +63,6 @@ extern void mpc83xx_restart(char *cmd);
 extern long mpc83xx_time_init(void);
 extern int mpc834x_usb_cfg(void);
 extern int mpc831x_usb_cfg(void);
+extern int qe_usb_clock_set(struct device_node *np);
 
 #endif				/* __MPC83XX_H__ */

@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <sysdev/fsl_soc.h>
+#include <asm/qe.h>
 
 #include "mpc83xx.h"
 

@@ -240,3 +241,69 @@ int mpc837x_usb_cfg(void)
 	return ret;
 }
 #endif /* CONFIG_PPC_MPC837x */
+
+#ifdef CONFIG_QUICC_ENGINE
+/* QE USB_CLOCK configure functions */
+int qe_usb_clock_set(struct device_node *np)
+{
+	u32 tmpreg = 0;
+	struct qe_mux *qemux = NULL;
+	const int *clock;
+
+	qemux = &qe_immr->qmx;
+
+	clock = of_get_property(np, "usb-clock", NULL);
+	if (!clock)
+		return -EINVAL;
+
+	/* CLK21 -> USBCLK on MPC8360-PB*/
+	tmpreg = in_be32(&qemux->cmxgcr) & ~QE_CMXGCR_USBCS;
+	switch (*clock) {
+	case 21:
+		tmpreg |= 0x8;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 20, 2, 0, 1, 0);  /* PC20 for CLK21 */
+		break;
+	case 19:
+		tmpreg |= 0x7;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 18, 2, 0, 1, 0);  /* PC18 for CLK19 */
+		break;
+	case 17:
+		tmpreg |= 0x6;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 16, 2, 0, 1, 0);  /* PC16 for CLK17 */
+		break;
+	case 13:
+		tmpreg |= 0x5;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 12, 2, 0, 1, 0);  /* PC12 for CLK13 */
+		break;
+	case 9:
+		tmpreg |= 0x4;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 8, 2, 0, 1, 0);  /* PC8 for CLK9 */
+		break;
+	case 7:
+		tmpreg |= 0x3;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 6, 2, 0, 1, 0);  /* PC6 for CLK7 */
+		break;
+	case 5:
+		tmpreg |= 0x2;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 4, 2, 0, 1, 0);  /* PC4 for CLK5 */
+		break;
+	case 3:
+		tmpreg |= 0x1;
+		out_be32(&qemux->cmxgcr, tmpreg);
+		par_io_config_pin(2, 2, 2, 0, 1, 0);  /* PC2 for CLK3 */
+		break;
+	default:
+		printk(KERN_ERR "Unsupport usb-clock input pin\n");
+	}
+
+	return 0;
+}
+#endif
+