Re: 8360 custom board, ucc_geth TX errors on longer(?) packets

Kim Phillips wrote:

On Fri, 01 Feb 2008 12:52:25 -0600
Steven Hein [off-list ref] wrote:

  

quoted

The one main difference in this board is how eth0 is wired.
We have a Broadcom GbE switch part, and UCC1 eth is wired
directly to that switch (no PHY).   (This where I needed to
    

sounds like you ran into some h/w errata.  if on rgmii, you might
want to find a way to program the switch for rgmii with internal delay
(8360 rev.2 rgmii-id rx & tx; 8360rev2.1 rgmii-rxid (i.e. for rx
only)).  If not, I'd contact fsl tech support directly.

Kim
  

I would suspect HW.....but this WORKS with the 2.6.16 kernel
I was using!    That's why I suspect that I still don't have
something configured right in my device tree, or something
else I missed in the new kernel.    But I can't
figure out what it is.... :-(    I've poured over the code in
the old versus new (both the ucc_geth driver and the platform
initialization in the old, and the device tree in the new)
and can't figure out what I missed!   And like I said, a
kernel with the same config (other than changing the platform)
works on my MPC8360E-MDS board.   Granted, that doesn't have
this direct switch connection......

I did look at the code related to the HW errata (QE_ENET18).
But we're using GMII to the switch....and that workaround
code wasn't in active in my old kernel (it was there, but
commented out).

Any other thoughts?    Has anyone seen this symptom before?

Steve

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Steve Hein (ssh@sgi.com)              Engineering Diagnostics/Software
Silicon Graphics, Inc.                          
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Chippewa Falls, WI 54729              Fax:   (715) 726-6715
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