Re: 85xx software reset problems from paulus.git

On Nov 16, 2007, at 4:01 PM, robert lazarski wrote:

On Nov 16, 2007 4:46 PM, Kumar Gala [off-list ref] wrote:

quoted

On Nov 16, 2007, at 3:28 PM, robert lazarski wrote:

quoted

On Nov 16, 2007 3:44 PM, robert lazarski [off-list ref]
wrote:

quoted

On Nov 16, 2007 10:27 AM, Clemens Koller
[off-list ref] wrote:

quoted

The SRESET# (pin AF20) is the soft reset input, causes
an mcp assertion to the core.... (RTFM)

That's what we are doing. The 85xx docs say "Soft reset. Causes a
machine check interrupt to the e500 core. Note that if the e500  
core
is not configured to process machine check interrupts, the  
assertion
of SRESET causes a core checkstop. SRESET need not be asserted  
during
a hard reset."

Sorry for replying to myself, but thought I'd mention SRESET works
fine on 85xx 2.6.23 , ie, the board resets after kernel panic. It
doesn't work for me on 2.6.24rc2 .

What actual 85xx are you using?

- k

Custom 8548 board. I'm using the cds 85xx code for a reference and I
calling the same reset functions.

1. do you have the following in your dts:

                 global-utilities@e0000 {        //global utilities reg
                         compatible = "fsl,mpc8548-guts";
                         reg = <e0000 1000>;
                         fsl,has-rstcr;
                 };


2. in your platform code are you using fsl_rstcr_restart in  
define_machine()

- k