RE: [PATCH 5/5] Add DMA engine driver for Freescale MPC85xx processors.
From: Zhang Wei-r63237 <hidden>
Date: 2007-09-11 10:06:24
Also in:
lkml
Hi,=20
quoted hunk ↗ jump to hunk
--- /dev/nullquoted
+++ b/drivers/dma/fsldma.c@@ -0,0 +1,995 @@=20 Thanks for using kernel-doc notation. However, ... =20quoted
+/** + * fsl_dma_alloc_descriptor - Allocate descriptor from=20channel's DMA pool. =20 Function parameters need to be listed & described here. See Documentation/kernel-doc-nano-HOWTO.txt or other source files for examples. =20 (Applies to all documented function interfaces here.)
All right, I'll add full descriptions here. :P
=20quoted
+ * + * Return - The descriptor allocated. NULL for failed. + */ +static struct fsl_desc_sw *fsl_dma_alloc_descriptor( + struct fsl_dma_chan *fsl_chan, + gfp_t flags) +{...quoted
+}=20quoted
+/** + * fsl_chan_xfer_ld_queue -- Transfer the link descriptors=20in channelquoted
+ * ld_queue.=20 The function's "short description" (unfortunately) must be on only one line. E.g.: =20 * fsl_chan_xfer_ld_queue - Transfer link descriptors in=20 channel ld_queue. =20
How about it's length greater than 80?
quoted
+ */ +static void fsl_chan_xfer_ld_queue(struct fsl_dma_chan *fsl_chan) +{...quoted
+}=20quoted
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h new file mode 100644 index 0000000..05be9ed --- /dev/null +++ b/drivers/dma/fsldma.h@@ -0,0 +1,188 @@ +struct fsl_dma_chan_regs { + __mix32 mr; /* 0x00 - Mode Register */ + __mix32 sr; /* 0x04 - Status Register */ + __mix64 cdar; /* 0x08 - Cureent descriptor=20address register */ =20 Current =20
I'll fix it. Thanks! - zw