Re: [PATCH 5/5] Add DMA engine driver for Freescale MPC85xx processors.

On 9/9/07, Timur Tabi [off-list ref] wrote:

Dan Williams wrote:

quoted

This routine implies that there is a piece of code somewhere that
wants to select which channels it can use.  A similar effect can be
achieved by registering a dma_client with the dmaengine interface
('dma_async_client_register').  Then when the client code makes a call
to 'dma_async_client_chan_request' it receives a 'dma_event_callback'
for each channel in the system.  It will also be asynchronously
notified of channels entering and leaving the system.  The goal is to
share a common infrastructure for channel management.

Are you familiar with the "flat device tree" used for PowerPC systems?  The
"piece of code somewhere" is the device tree subsystem that parses the device
tree, which is compiled from the .dts files in arch/powerpc/boot/dts.

The FDT is how PowerPC systems specify hardware configuration.  In the case of
85xx, the FDT contains entries for each DMA device (typically 2), and the
entries contain sub-entries for each DMA channel as well as the address of the
register sets for each channel.

Ahh, ok then this code is replacing what would normally be handled by
the PCI bus enumeration code, or the platform device registrations for
iop-adma in arch/arm/mach-iop13xx.  Sorry for the noise with this
comment.

--
Timur Tabi
Linux Kernel Developer @ Freescale
-

Thanks,
Dan