RE: [PATCH] [UPDATED] tsec: Allow Ten Bit Interface to be configurable

-----Original Message-----
From: Scott Wood [mailto:scottwood@freescale.com]
Sent: Tuesday, August 14, 2007 11:16 AM
To: Andy Fleming
Cc: joe.hamman@embeddedspecialties.com; linuxppc-embedded@ozlabs.org
Subject: Re: [PATCH] [UPDATED] tsec: Allow Ten Bit Interface to be
configurable

Andy Fleming wrote:

quoted

It's actually a per-tsec property.  There's not one tbi, there's one
per TSEC.  The one on TSEC 0 is special in that it can interfere with
PHYs on the MDIO bus.

So I would suggest making it a property of the ethernet node:

ethernet@24000 {
...
tbipa = <1f>;
...
}

"tbipa" isn't likely to pass the Segher test. :-)

If the TBI address is in PHY-space, then it should go in the MDIO bus.
For the second TSEC, create a second MDIO bus node.

How about something like this?

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "mdio";
			compatible = "gianfar";
			reg = <24520 20>;
			phy1f: ethernet-phy@1f {
				reg = <1f>;
				device_type = "ethernet-phy";
			};
			phy0: ethernet-phy@0 {
				reg = <0>;
				device_type = "ethernet-phy";
			};
			phy1: ethernet-phy@1 {
				reg = <1>;
				device_type = "ethernet-phy";
			};
			phy2: ethernet-phy@2 {
				reg = <2>;
				device_type = "ethernet-phy";
			};
			tbi1e: ethernet-tbi@1e {
				reg = <1e>;
				device_type = "ethernet-tbi";
			};
		};

		ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "eTSEC";
			compatible = "gianfar";
			reg = <24000 1000>;
			mac-address = [ 00 E0 0C 00 73 00 ];
			interrupts = <1d 2 1e 2 22 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy1f>;
			tbi-handle = <&tbi1e>;
		};


Joe