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-----Original Message-----
From: linuxppc-dev-bounces+b08248=3Dfreescale.com@ozlabs.org=20
[mailto:linuxppc-dev-bounces+b08248=3Dfreescale.com@ozlabs.org]=20
On Behalf Of Segher Boessenkool
Sent: Thursday, February 22, 2007 5:06 AM
To: David Gibson
Cc: linuxppc-dev@ozlabs.org; paulus@samba.org; Yoder Stuart-B08248
Subject: Re: [PATCH] powerpc: document new interrupt-array property
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quoted

quoted

Not really a hack, this is documented in the interrupt
binding:

No, it really is a hack, I'm afraid.  interrupt-map doesn't=20

in general

quoted

make sense for mapping interrupt-children which are not physical
children.  Why?  Because the interrupt map includes unit specifiers,
which means the expected addressing format in the interrupt map must
match that of the reg property in every node mapped through it.

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Hrm I guess I misunderstood the way you do things now.
Could you give an example?  I'm too lazy to look up
the DTS file :-)

So there seems to be 3 options:

Option #1 -- Current 'hack' :) looks like this.  This works but is
ugly.

  MAL0: mcmal {
      /* FIXME */
      device_type =3D "mcmal-dma";
      compatible =3D "ibm,mcmal-440gp", "ibm,mcmal";
      dcr-reg =3D <180 62>;
      num-tx-chans =3D <4>;
      num-rx-chans =3D <4>;
      interrupt-parent =3D <&MAL0>;
      interrupts =3D <0 1 2 3 4>;
      #interrupt-cells =3D <1>;
      #address-cells =3D <0>;
      #size-cells =3D <0>;
      interrupt-map =3D </*TXEOB*/ 0 &UIC0 a 4
               /*RXEOB*/ 1 &UIC0 b 4
               /*SERR*/  2 &UIC1 0 4
               /*TXDE*/  3 &UIC1 1 4
               /*RXDE*/  4 &UIC1 2 4>;
      interrupt-map-mask =3D <ffffffff>;
  };

Option #2 -- new interrupt-array property.  MAL would look
like this:

  MAL0: mcmal {
      /* FIXME */
      device_type =3D "mcmal-dma";
      compatible =3D "ibm,mcmal-440gp", "ibm,mcmal";
      dcr-reg =3D <180 62>;
      num-tx-chans =3D <4>;
      num-rx-chans =3D <4>;
      interrupt-array =3D <&UIC0 a 4
                         &UIC0 b 4
                         &UIC1 0 4
                         &UIC1 1 4
                         &UIC1 2 4>;
  };

Option #3 -- define new, logical interrupt nexus to do
the mapping.   Not sure if I got this right but here is
my take on what this might look like:

  MALINT: malint_nexus {
      #interrupt-cells =3D <1>;
      #address-cells =3D <0>;
      #size-cells =3D <0>;
      interrupt-map =3D </*TXEOB*/ 0 &UIC0 a 4
               /*RXEOB*/ 1 &UIC0 b 4
               /*SERR*/  2 &UIC1 0 4
               /*TXDE*/  3 &UIC1 1 4
               /*RXDE*/  4 &UIC1 2 4>;
      interrupt-map-mask =3D <ffffffff>;
  }

  MAL0: mcmal {
      /* FIXME */
      device_type =3D "mcmal-dma";
      compatible =3D "ibm,mcmal-440gp", "ibm,mcmal";
      dcr-reg =3D <180 62>;
      num-tx-chans =3D <4>;
      num-rx-chans =3D <4>;
      interrupt-parent =3D <&MALINT>;
      interrupts =3D <0 1 2 3 4>;
  };

The malint_nexus node is attache to / I guess??  Segher
is this what you had in mind?

The question is-- is option #3 clear enough?  Is a new
property warranted?

Stuart=20