Thread (6 messages) flat view 6 messages, 5 authors, 2006-09-26

Re: [PATCH] Lazy interrupt disabling for 64-bit machines

From: Olof Johansson <hidden>
Date: 2006-09-26 15:43:56

On Tue, 26 Sep 2006 19:12:06 +1000 Benjamin Herrenschmidt [off-list ref] wrote:
quoted
I like it. Got any benchmarks that show a difference?

At first glance I found it a bit hard to follow, since the old+new
terminology is a bit complicated. There's softe, proc_enabled and
hard_enabled. A s/proc_enabled/soft_enabled/g (and similar for
asm-offsets) might make it a little more intuitive, since you're
touching most uses of it already?
Now think about using -ffixed=crN ... reserve a CR field and use that
for per-cpu flags like that :)
You can also get away from doing the mfspr(SPRN_DEC) in
local_irq_enable() by changing the polarity of hard_enabled to
hard_disabled, and have different values for why it was disabled. Saves
an mfspr which can be costly, but adds one instruction (li (n>>8) or
so) in the exception entry path. Not which way that tradeoff will
swing, without benchmarking to show benefit it's just added complexity.

That can be done with a fixed cr too, it just uses two bits instead of
one. There are fewer to take from there though.


-Olof
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