RE: [PATCH 4/11] qe_lib: Add QE I/O ports API

Hi Leo

As you know I working with your earlier patches, trying to adopt them
for
8321. Everthing works but ethernet on UCC2 and UCC4, ethernet on UCC3
works though.

Anyhow I found some minor changes I had to do to match 8321 that is
generic 83xx code.
Below is the first:

---
 arch/powerpc/sysdev/qe_lib/qe_io.c |  272=20
+#define NUM_OF_PAR_IOS  7

NUM_OF_PAR_IOS is 4 on 8321

+static int qe_irq_ports[NUM_OF_PAR_IOS][NUM_OF_PINS] =3D {
+	/* 0-7 */          /* 8-15 */      /* 16 - 23 */     /*=20
24 - 31 */
+	{0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,1, 1,0,0,0,0,0,0,0,=20
0,0,0,0,0,1,1,0},
+	{0,0,0,1,0,1,0,0, 0,0,0,0,1,1,0,0, 0,0,0,0,0,0,0,0,=20
0,0,1,1,0,0,0,0},
+	{0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,=20
0,0,0,1,1,1,0,0},
+	{0,0,0,0,0,0,0,0, 0,0,0,0,1,1,0,0, 1,1,0,0,0,0,0,0,=20
0,0,1,1,0,0,0,0},
+	{0,0,0,0,0,0,0,0, 0,0,0,0,1,1,0,0, 0,0,0,0,0,0,0,0,=20
1,1,1,1,0,0,0,1},
+	{0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,1,0,0,0,=20
0,0,0,0,0,0,0,0},
+	{0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,=20
0,0,0,0,0,0,0,1}
+};

qe_irq_ports is diffrent on 8321 not only the number of rows.

These needs to configuruable based on CPU model and/or type of board.

 Jocke