Re: [POWERPC] convert string i/o operations to C

But it couldn't hurt, right? There has to be an application note  
per-CPU on the correct sequence of operations for such an access (I  
seem to have collected a directory full for firmware development),

The architecture describes the rules already, not many CPUs
have "faster"/"better" sequences.

it seems a little odd to pick and choose one instruction over  
another for one thing, and then say you need to do it to support  
the 601 of all things, and run this code against the G3/G4/G5 which  
perhaps doesn't care or is more intelligent about it (or is  
guaranteed to have a more intelligent host bridge at least).

The comment you're referring to is old; it doesn't talk about
synchronisation requirements, but focuses on having the CPU
trap on exactly these instructions when an access causes a
(asynchronous) machine check.  Asynchronous exceptions don't
necessarily return the instruction pointer where the real
failure was, so it's no surprise different CPUs have a different
idea about it.  It's pretty safe to assume (but not guaranteed)
that it will always be somewhere between the load and the insn
after the isync, inclusive, though.


Segher