Thread (7 messages) 7 messages, 2 authors, 2006-02-20

Re: 440gx GPIO

From: Ed Goforth <hidden>
Date: 2006-02-14 13:48:58

I posted the original from home, and didn't have the contents of the
config register.  It is
cfg     0x00103e00
Which I interpret as having bit 11 set: "1 Enable GPIO11 as GPIO11"
from the manual.

I originally tried to call ioremap64(PPC440GX_GPIO0_ADDR,) directly, but go=
t
"unresolved symbol ioremap64".  From inspection of ioremap(), the
fixup for 0x40000700 translates to 0x140000700, and I get the same
values in my code as I see from a "/proc/ocotea/gpio".

Is my approach valid?

Thanks,
Ed

On 2/14/06, Eugene Surovegin [off-list ref] wrote:
On Tue, Feb 14, 2006 at 12:20:35AM -0500, Ed Goforth wrote:
quoted
I am struggling with a problem and I hope someone can give me some
pointers.  We have a custom board with a 440gx.  I need to drive GPIO11
low.  The best as I can tell from the docs, I need to set bit 11 of the
TCR to 1 and bit 11 of the OR to 0 to do this.
Check that this pin is enabled as GPIO not as a function pin
(SDR0_PFC0 register).

Also, just to be sure that you remapped GPIO registers correctly, use
ioremap64 with full physical address (not just low 32 bits).

--
Eugene
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