On Fri, Feb 11, 2000, Geert Uytterhoeven [off-list ref] wrote:
and OPENPIC_MASK is still set when the loop times out on enabling
IRQ_8259_CASCADE in chrp_init_IRQ(). How is this possible? There's an eieio()
after each register write and the mb() does sync.
Is this the only interrupt causing this behaviour ? I beleive that means
either the mask register is not implemented for the cascade or a hw bug.
I'll try to have a look at my docs this week-end.
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/