Luca Coelho [off-list ref] wrote:

From: Johannes Berg <redacted>

The TR/CR tail data are meant to be per-queue-arrays, however,
we allocate them completely wrong (we have a separate allocation
per queue).

Looking at this more closely, it turns out that the hardware
never uses these - we have a separate free list per RX queue
and maintain a write pointer for that in a register, and the
RX itself is indicated in the RB status (rb_stts) DMA region.

Despite nothing using the tail pointers, the hardware will
unconditionally access them to write updates, even when we aren't
using CRs/TRs.

Give it dummy values that we never use/update so it can do that
without causing trouble.

Signed-off-by: Johannes Berg <redacted>
Signed-off-by: Luca Coelho <redacted>

Patch applied to iwlwifi-next.git, thanks.

a5575a54df00 iwlwifi: pcie: remove TR/CR tail allocations