On Thu, 2021-06-17 at 10:08 +0300, Luca Coelho wrote:

From: Johannes Berg <redacted>

The TR/CR tail data are meant to be per-queue-arrays, however,
we allocate them completely wrong (we have a separate allocation
per queue).

Looking at this more closely, it turns out that the hardware
never uses these - we have a separate free list per RX queue
and maintain a write pointer for that in a register, and the
RX itself is indicated in the RB status (rb_stts) DMA region.

Therefore, remove the TR/CR tail allocations completely.

I guess you should've updated the commit message when squashing in the
fix here - we do need to give it dummy pointers, and the hardware *does*
use them, just for no relevant purpose :)

johannes