Hi

On Fri, Aug 24, 2012 at 06:25:42PM +0300, Daniel Golle wrote:

On Wed, Aug 22, 2012 at 12:51:10PM +0200, Stanislaw Gruszka wrote:

quoted

Please address my comments from previous patch.

I fixed the CodingStyle issues you mentioned and simplified the initilization of
the TX_SW_CFG{0,1,2} registers similarly to other SoCs.

Thanks. Could you also provide information what was the source
(registers programming) you based when writing this patch?

+	if (rt2x00_rt(rt2x00dev, RT3352)) {
+		rt2800_bbp_write(rt2x00dev, 27, 0x0);
+		rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
+		rt2800_bbp_write(rt2x00dev, 27, 0x20);
+		rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);

Writes two times to the same registers are intended?

Stanislaw