[RFC/RFT v2 08/12] ath9k: use common function for disabling ASPM
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From: Stanislaw Gruszka <hidden>
Date: 2011-07-27 12:13:58
Subsystem:
atheros ath generic utilities, qualcomm atheros ath9k wireless driver, the rest · Maintainers:
Jeff Johnson, Toke Høiland-Jørgensen, Linus Torvalds
Disable ASPM using common function, this works also with CONFIG_PCIEASPM=y. Signed-off-by: Stanislaw Gruszka <redacted> --- drivers/net/wireless/ath/ath9k/pci.c | 29 ++++++----------------------- 1 files changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 494ec0f..a92e55f 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c@@ -111,43 +111,26 @@ static void ath_pci_aspm_init(struct ath_softc *sc) struct ath_hw *ah = sc->sc_ah; struct pci_dev *pdev = to_pci_dev(sc->dev); struct pci_dev *parent; - int pos, ppos; + int pos; u8 aspm; ah->aspm_enabled = false; - pos = pci_pcie_cap(pdev); - if (!pos) + if (!pci_is_pcie(pdev)) return; - parent = pdev->bus->self; - if (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) { /* Bluetooth coexistance requires disabling ASPM. */ - pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm); - aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); - pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm); - - /* - * Both upstream and downstream PCIe components should - * have the same ASPM settings. - */ - if (WARN_ON(!parent)) - return; - - ppos = pci_pcie_cap(parent); - pci_read_config_byte(parent, ppos + PCI_EXP_LNKCTL, &aspm); - aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); - pci_write_config_byte(parent, ppos + PCI_EXP_LNKCTL, aspm); - + pcie_disable_aspm(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); return; } + parent = pdev->bus->self; if (WARN_ON(!parent)) return; - ppos = pci_pcie_cap(parent); - pci_read_config_byte(parent, ppos + PCI_EXP_LNKCTL, &aspm); + pos = pci_pcie_cap(parent); + pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { ah->aspm_enabled = true; /* Initialize PCIe PM and SERDES registers. */
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1.7.1