Thread (23 messages) 23 messages, 4 authors, 2026-08-25

Re: [PATCH v5 01/10] dt-bindings: reserved-memory: Document Tegra VPR

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From: sashiko-bot@kernel.org
Date: 2026-08-14 15:39:48
Also in: dri-devel, linux-devicetree, linux-s390

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The examples use 64-bit values for `size` and `alignment` but are missing a parent `reserved-memory` node to define `#size-cells = <2>`.
--
--- Patch [1]: [PATCH v5 01/10] dt-bindings: reserved-memory: Document Tegra VPR ---
commit f3aef7e4bf1dca49011b483a566145d2ddfdd64a
Author: Thierry Reding [off-list ref]

dt-bindings: reserved-memory: Document Tegra VPR

This commit documents the device tree bindings for the NVIDIA Tegra Video
Protection Region (VPR). It defines a fixed VPR using the "reg" property
and a resizable VPR using "size" and "alignment".
quoted hunk ↗ jump to hunk
diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml
new file mode 100644
index 0000000000000..862bfd3913786
--- /dev/null
+++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml
[ ... ]
quoted hunk ↗ jump to hunk
+examples:
+  - |
+    /* resizable VPR */
+    protected {
+      compatible = "nvidia,tegra-video-protection-region";
+
+      size = <0x0 0x70000000>;
+      alignment = <0x0 0x100000>;
[Severity: Low]
Will this cause dt_binding_check to fail?

The 64-bit values for size and alignment contain 2 cells each. This violates
the core reserved-memory.yaml schema when parsed with the default root
node context, which sets #size-cells = <1>.

Could the examples be wrapped in a reserved-memory parent node that
explicitly sets #address-cells = <2> and #size-cells = <2>?
+      reusable;
+    };
-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260814-tegra-vpr-v5-0-71832b5d0246@nvidia.com?part=1
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