Thread (63 messages) 63 messages, 10 authors, 2025-03-27
STALE437d

[RFC PATCH V3 08/43] rv64ilp32_abi: riscv: bitops: Adapt ctzw & clzw of zbb extension

From: guoren@kernel.org
Date: 2025-03-25 12:18:43
Also in: bpf, kvm, kvm-riscv, linux-arch, linux-btrfs, linux-crypto, linux-fsdevel, linux-input, linux-media, linux-mm, linux-nfs, linux-perf-users, linux-riscv, linux-sctp, linux-serial, linux-usb, lkml, netdev, netfilter-devel
Subsystem: bitops api, risc-v architecture, the rest · Maintainers: Yury Norov, Paul Walmsley, Palmer Dabbelt, Albert Ou, Linus Torvalds

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

The RV64ILP32 ABI is based on 64-bit ISA, but BITS_PER_LONG is 32.
Use ctzw and clzw for int and long types instead of ctz and clz.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
 arch/riscv/include/asm/bitops.h | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
index c6bd3d8354a9..d041b9e3ba84 100644
--- a/arch/riscv/include/asm/bitops.h
+++ b/arch/riscv/include/asm/bitops.h
@@ -35,14 +35,27 @@
 #include <asm/alternative-macros.h>
 #include <asm/hwcap.h>
 
-#if (BITS_PER_LONG == 64)
+#if (__riscv_xlen == 64)
 #define CTZW	"ctzw "
 #define CLZW	"clzw "
+
+#if (BITS_PER_LONG == 64)
+#define CTZ	"ctz "
+#define CLZ	"clz "
 #elif (BITS_PER_LONG == 32)
+#define CTZ	"ctzw "
+#define CLZ	"clzw "
+#else
+#error "Unexpected BITS_PER_LONG"
+#endif
+
+#elif (__riscv_xlen == 32)
 #define CTZW	"ctz "
 #define CLZW	"clz "
+#define CTZ	"ctz "
+#define CLZ	"clz "
 #else
-#error "Unexpected BITS_PER_LONG"
+#error "Unexpected __riscv_xlen"
 #endif
 
 static __always_inline unsigned long variable__ffs(unsigned long word)
@@ -53,7 +66,7 @@ static __always_inline unsigned long variable__ffs(unsigned long word)
 
 	asm volatile (".option push\n"
 		      ".option arch,+zbb\n"
-		      "ctz %0, %1\n"
+		      CTZ "%0, %1\n"
 		      ".option pop\n"
 		      : "=r" (word) : "r" (word) :);
 
@@ -82,7 +95,7 @@ static __always_inline unsigned long variable__fls(unsigned long word)
 
 	asm volatile (".option push\n"
 		      ".option arch,+zbb\n"
-		      "clz %0, %1\n"
+		      CLZ "%0, %1\n"
 		      ".option pop\n"
 		      : "=r" (word) : "r" (word) :);
 
-- 
2.40.1
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