[PATCH v3 37/38] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4
STALE2954d
REVIEWED: 1 (0M)
From: Aapo Vienamo <hidden>
Date: 2018-08-30 15:08:44
Also in:
linux-devicetree, linux-mmc, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
Revision v3 of 3 in this series; 1 review trailer.
Revisions (3)
- v1 [diff vs current]
- v2 [diff vs current]
- v3 current
Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by setting the assigned-clocks device tree properties. pllc4 offer better jitter performance and should be used with higher speed modes like HS200 and HS400. Signed-off-by: Aapo Vienamo <redacted> Acked-by: Thierry Reding <redacted> --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 3b2fe0d99aaf..6e9ef26a4253 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi@@ -248,6 +248,9 @@ nvidia,pad-autocal-pull-down-offset-sdr104 = <0x05>; nvidia,default-tap = <0x5>; nvidia,default-trim = <0xb>; + assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC1>, + <&bpmp TEGRA186_CLK_PLLP_OUT0>; + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>; status = "disabled"; };
@@ -299,6 +302,9 @@ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bpmp TEGRA186_CLK_SDMMC4>; clock-names = "sdhci"; + assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>, + <&bpmp TEGRA186_CLK_PLLC4_VCO>; + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>; resets = <&bpmp TEGRA186_RESET_SDMMC4>; reset-names = "sdhci"; nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;
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2.18.0