[PATCH/RFC 6/8] serial: pxa: Update DT binding documentation
From: Kevin Cernekee <cernekee@gmail.com>
Date: 2014-11-12 08:46:31
Also in:
linux-devicetree, linux-mips
Subsystem:
open firmware and flattened device tree bindings, the rest, tty layer and serial drivers · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds, Greg Kroah-Hartman, Jiri Slaby
Add a couple of missing required properties; add the new optional properties and an example. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> --- .../devicetree/bindings/serial/mrvl-serial.txt | 34 +++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/mrvl-serial.txt b/Documentation/devicetree/bindings/serial/mrvl-serial.txt
index d744340..5bab455 100644
--- a/Documentation/devicetree/bindings/serial/mrvl-serial.txt
+++ b/Documentation/devicetree/bindings/serial/mrvl-serial.txt@@ -1,4 +1,36 @@ PXA UART controller Required properties: -- compatible : should be "mrvl,mmp-uart" or "mrvl,pxa-uart". +- compatible : should be "mrvl,mmp-uart", "mrvl,pxa-uart", or + "brcm,bcm7401-uart". +- interrupts : a single interrupt specifier. +- clocks : phandle to a clock; used to compute the baud divisor. + +Optional properties: +- fifo-size : defaults to 64 bytes. +- big-endian : always use BE register accesses. +- native-endian : use BE register accesses if the kernel was built for BE, + otherwise use LE register accesses. + +Example: + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + uart_clk: uart_clk@0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <81000000>; + }; + }; + + uart0: serial@10406900 { + compatible = "brcm,bcm7401-upg-uart"; + reg = <0x10406900 0x20>; + native-endian; + fifo-size = <32>; + interrupt-parent = <&periph_intc>; + interrupts = <64>; + clocks = <&uart_clk>; + };
--
2.1.1