Re: [PATCH] Clear previous interrupts after fifo is disabled
From: Chanho Min <hidden>
Date: 2012-02-28 09:16:19
Also in:
lkml
RXFE _will_ be set. Think about it - RXFE means Receive Fifo Empty. If the receive fifo is empty, it _will_ be set.
I know meaning of the RXFE. I also don't understand why RXFE is set by clearing FEN. We checked this by bellow debug codes. fr_before = readw(uap->port.membase + UART01x_FR); writew(0, uap->port.membase + uap->lcrh_rx); fr_after = readw(uap->port.membase + UART01x_FR); If rx interrupt is ocurred before, fr_after becomes 0x90 but fr_before is 0x80.
And RIS is the _Raw_ interrupt status. That's the status _before_ the mask is acted upon. But it won't be delivered because the mask register is zero.
It can be delivered just after mask register is set to 1.
quoted
Root cause is that Rx interrupt set but Rx fifo is empty. If we just remove the sentence for clearing LCRH, nothing happens and interrupt handler don't this misbehave.No.
When we just removed the sentence for clearing LCRH, this hangup doesn't happen. -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html