Re: [PATCH 04/13] dt-bindings: riscv: update microchip polarfire binds

On 09/11/2021 08:34, Geert Uytterhoeven wrote:

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Hi Conor,

On Mon, Nov 8, 2021 at 4:06 PM [off-list ref] wrote:

quoted

From: Conor Dooley <conor.dooley@microchip.com>

Add mpfs-soc to clear undocumented binding warning

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
  Documentation/devicetree/bindings/riscv/microchip.yaml | 1 +
  1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml
index 3f981e897126..1ff7a5224bbc 100644
--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml

@@ -21,6 +21,7 @@ properties:
        - enum:
            - microchip,mpfs-icicle-kit
        - const: microchip,mpfs
+      - const: microchip,mpfs-soc

Doesn't the "s" in "mpfs" already stand for "soc"?

not wrong, but using mpf-soc would be confusing since "mpf" is the part 
name for the non soc fpga. is it fine to just reuse "mpfs" for the dtsi 
overall compatible and for the soc subsection?

Gr{oetje,eeting}s,

                         Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                 -- Linus Torvalds