Kar Hin Ong [off-list ref] writes:

quoted

I don't have access to the document you mentioned, but I know that chipsets
have a knob to control that behaviour. Just checked a few chipset docs and they
contain the same sentence, but then in the next paragraph they say:

 "If the I/OxAPIC entry is masked (via the mask bit in the corresponding
  Redirection Table Entry), then the corresponding PCI Express
  interrupt(s) is forwarded to the legacy ICH, provided the Disable PCI
  INTx Routing to ICH bit is clear, Section 19.10.2.27, QPIPINTRC: Intel
  QuickPath Interconnect Protocol Interrupt Control."

That control bit is 0 after reset, so the legacy forwarding works.

Intel support engineer do provide similar advice to us as a workaround
to the CPU behaviour.  They said we could enable the "Don'tRouteToPCH"
bit in the BIOS to block the interrupt from propagating to PCH.  This
bit is located at "Coherent Interface Protocol Interrupt Control
(cipintrc)" register of "Virtualization" device (Bus 0, Device 5,
Function 0, Offset 0x14C).

With the help of our BIOS engineer, after setting this bit in BIOS
does prevent the interrupt forwarding.

However, Intel told us that this workaround is not validated, i.e. the
side effect of setting this bit is unknown.

What? That's ridiculous.

That bit is documented in various chipset documents and that legacy
rerouting is really just there to support OSes which do not support
multiple IO-APICs properly.

If setting this bit has unknown side effects then someone at Intel
should have a close look and fix their documentation.

Can the Intel people on Cc please take care of this?

As we have already quirks in drivers/pci/quirks.c which handle the same
issue on older chipsets, we really should add one for these kind of
systems to avoid fiddling with the BIOS (which you can, but most people
cannot).

Thanks,

        tglx