Thread (59 messages) 59 messages, 6 authors, 2021-09-17

Re: [PATCH 01/19] x86/cpufreatures: add AMD CPPC extension feature flag

From: Shuah Khan <skhan@linuxfoundation.org>
Date: 2021-09-08 20:00:10
Also in: lkml

On 9/8/21 8:59 AM, Huang Rui wrote:
Add Collaborative Processor Performance Control Extension feature flag
for AMD processors.
Please add a couple of sentences about the feature and what it does.
quoted hunk ↗ jump to hunk
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
  arch/x86/include/asm/cpufeatures.h | 1 +
  1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index d0ce5cfd3ac1..f7aea50e3371 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -313,6 +313,7 @@
  #define X86_FEATURE_AMD_SSBD		(13*32+24) /* "" Speculative Store Bypass Disable */
  #define X86_FEATURE_VIRT_SSBD		(13*32+25) /* Virtualized Speculative Store Bypass Disable */
  #define X86_FEATURE_AMD_SSB_NO		(13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
+#define X86_FEATURE_AMD_CPPC_EXT	(13*32+27) /* Collaborative Processor Performance Control Extension */
  
  /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
  #define X86_FEATURE_DTHERM		(14*32+ 0) /* Digital Thermal Sensor */
thanks,
-- Shuah
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