Thread (78 messages) 78 messages, 13 authors, 2017-10-20

Re: x86: PIE support and option to extend KASLR randomization

From: Thomas Garnier <hidden>
Date: 2017-09-21 21:16:43
Also in: kvm, linux-arch, linux-crypto

On Thu, Sep 21, 2017 at 8:59 AM, Ingo Molnar [off-list ref] wrote:
( Sorry about the delay in answering this. I could blame the delay on the merge
  window, but in reality I've been procrastinating this is due to the permanent,
  non-trivial impact PIE has on generated C code. )

* Thomas Garnier [off-list ref] wrote:
quoted
1) PIE sometime needs two instructions to represent a single
instruction on mcmodel=kernel.
What again is the typical frequency of this occurring in an x86-64 defconfig
kernel, with the very latest GCC?
I am not sure what is the best way to measure that.
Also, to make sure: which unwinder did you use for your measurements,
frame-pointers or ORC? Please use ORC only for future numbers, as
frame-pointers is obsolete from a performance measurement POV.
I used the default configuration which uses frame-pointer. I built all
the different binaries with ORC and I see an improvement in size:

On latest revision (just built and ran performance tests this week):

With framepointer: PIE .text is 0.837324% than baseline

With ORC: PIE .text is 0.814224% than baseline

Comparing baselines only, ORC is -2.849832% than frame-pointers.
quoted
2) GCC does not optimize switches in PIE in order to reduce relocations:
Hopefully this can either be fixed in GCC or at least influenced via a compiler
switch in the future.
quoted
The switches are the biggest increase on small functions but I don't
think they represent a large portion of the difference (number 1 is).
Ok.
quoted
A side note, while testing gcc 7.2.0 on hackbench I have seen the PIE
kernel being faster by 1% across multiple runs (comparing 50 runs done
across 5 reboots twice). I don't think PIE is faster than a
mcmodel=kernel but recent versions of gcc makes them fairly similar.
So I think we are down to an overhead range where the inherent noise (both random
and systematic one) in 'hackbench' overwhelms the signal we are trying to measure.

So I think it's the kernel .text size change that is the best noise-free proxy for
the overhead impact of PIE.
I agree but it might be hard to measure the exact impact. What is
acceptable and what is not?
It doesn't hurt to double check actual real performance as well, just don't expect
there to be much of a signal for anything but fully cached microbenchmark
workloads.
That's aligned with what I see in the latest performance testing.
Performance is close enough that it is hard to get exact numbers (pie
is just a bit slower than baseline on hackench (~1%)).
Thanks,

        Ingo


-- 
Thomas
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