[RFC v2 10/23] x86/CPU: Adapt assembly for PIE support
From: Thomas Garnier <hidden>
Date: 2017-08-10 17:26:02
Also in:
kvm, linux-arch, linux-crypto, xen-devel
Subsystem:
the rest, x86 architecture (32-bit and 64-bit) · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen
Change the assembly code to use only relative references of symbols for the kernel to be PIE compatible. Use the new _ASM_GET_PTR macro instead of the 'mov $symbol, %dst' construct to not have an absolute reference. Position Independent Executable (PIE) support will allow to extended the KASLR randomization range below the -2G memory limit. Signed-off-by: Thomas Garnier <redacted> --- arch/x86/include/asm/processor.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c1352771b2f6..14fc21e2df08 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h@@ -49,7 +49,7 @@ static inline void *current_text_addr(void) { void *pc; - asm volatile("mov $1f, %0; 1:":"=r" (pc)); + asm volatile(_ASM_GET_PTR(1f, %0) "; 1:":"=r" (pc)); return pc; }
@@ -689,6 +689,7 @@ static inline void sync_core(void) : "+r" (__sp) : : "memory"); #else unsigned int tmp; + unsigned long tmp2; asm volatile ( UNWIND_HINT_SAVE
@@ -699,11 +700,12 @@ static inline void sync_core(void) "pushfq\n\t" "mov %%cs, %0\n\t" "pushq %q0\n\t" - "pushq $1f\n\t" + "leaq 1f(%%rip), %1\n\t" + "pushq %1\n\t" "iretq\n\t" UNWIND_HINT_RESTORE "1:" - : "=&r" (tmp), "+r" (__sp) : : "cc", "memory"); + : "=&r" (tmp), "=&r" (tmp2), "+r" (__sp) : : "cc", "memory"); #endif }
--
2.14.0.434.g98096fd7a8-goog
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