On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:

On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven [off-list ref] wrote:

quoted

On 9/25/2013 4:47 PM, Andi Kleen wrote:

quoted

quoted

Also, the changelogs don't appear to discuss one obvious downside: the
latency incurred in bringing a bank out of one of the low-power states
and back into full operation.  Please do discuss and quantify that to
the best of your knowledge.

On Sandy Bridge the memry wakeup overhead is really small. It's on by default
in most setups today.

btw note that those kind of memory power savings are content-preserving,
so likely a whole chunk of these patches is not actually needed on SNB
(or anything else Intel sells or sold)

(head spinning a bit).  Could you please expand on this rather a lot?

As far as I understand there is a range of aggressiveness. You could
just group memory a bit better (assuming you can sufficiently predict
the future or have some interface to let someone tell you about it).

Or you can actually move memory around later to get as low footprint
as possible.

This patchkit seems to do both, with the later parts being on the
aggressive side (move things around) 

If you had non content preserving memory saving you would 
need to be aggressive as you couldn't afford any mistakes.

If you had very slow wakeup you also couldn't afford mistakes,
as those could cost a lot of time.

On SandyBridge is not slow and it's preserving, so some mistakes are ok.

But being aggressive (so move things around) may still help you saving
more power -- i guess only benchmarks can tell. It's a trade off between
potential gain and potential worse case performance regression.
It may also depend on the workload.

At least right now the numbers seem to be positive.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only.

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