Thread (33 messages) 33 messages, 4 authors, 2021-08-06

Re: [PATCH 3/6] perf cs-etm: Save TRCDEVARCH register

From: Leo Yan <hidden>
Date: 2021-07-31 07:44:00
Also in: linux-arm-kernel, lkml

On Wed, Jul 21, 2021 at 10:07:02AM +0100, James Clark wrote:
Now that the metadata has a length field we can add extra registers
without breaking any previous versions of perf.

Save the TRCDEVARCH register so that it can be used to configure the ETE
decoder in the next commit. If the sysfs file doesn't exist then 0 will
be saved which is an impossible register value and can also be used to
signify that the file couldn't be read.
After reviewed the whole patch set, come back to highlight one thing:
seems to me ETE is only a feature introduced by new ETMv4 revisions; in
other words, if we support ETMv4.5 or any later revisions, it will
support ETE feature.

Here I think the right thing to do is to support newer revisions for
ETMv4, and then based on the revision it creates a decoder with
supporting ETE feature.  For a more neat solution, if the perf tool
passes the "correct" revision number to the OpenCSD decoder, it should
can decode trace data with ETE packets.  In this way, the ETE decoding
can be transparent for perf cs-etm code.

How about you think for this?  Sorry if I introduce noise due to my
lack knowledge (and platform) for ETE.

Thanks,
Leo
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